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Computer Architectures @ Politecnico di Torino

Computer Architectures at Politecnico di Torino: LandTiger board, ASE Studio and its RISC-V pipeline visualizer

On this website you will find:

  • all the projects developed for the NXP LPC1768 LANDTIGER board;
  • useful information about the tools used in the course ;
  • past special projects and past extra points assignments, with their solutions and demos.

Professors

At a glance

A pretty demo about ARM based System-on-Chip (SoC) bare metal programming. Case study is a LANDTIGER board, based on a NXP LPC1768 SoC.

Life Test on GitLab

LANDTIGER board
Night time live demo of Life Test for the LANDTIGER board

ASE Studio simulates programs on a parametrizable RISC-V CPU with the gem5 microarchitectural simulator and visualizes the pipeline cycle by cycle: write RISC-V assembly, run it, and see how each instruction flows through Fetch, Decode, Execute, Memory and Writeback, including stalls, forwarding, caches and branch prediction.

How it works: the gem5 backend ASE Studio on GitHub

ASE Studio pipeline view: instructions over clock cycles in a five-stage pipeline
Pipeline view example.

Explore

  • Extra points assignments

    Projects assigned during the year, with assignments and student solutions — from a pedestrian crossing to Pac-Man and Tetris.

    Open

  • LandTiger special projects

    Student projects on the NXP LPC1768 SoC (ARM Cortex-M3), 2019–2021.

    Open

  • AURIX Instrumented Bike

    Instrumented Bike project on the Infineon TriCore multiprocessor SoC.

    Open

Source code

  • GitLab

    The course GitLab: board libraries, sample projects and course resources for the LANDTIGER. Accounts are created by the course administrators on request.

    Open GitLab

  • GitHub

    Public repositories of the CAD & Reliability research groups (cad-polito-it) used in the course:

    All repositories